Voice: (206) 543-9342;
FAX: (206) 543-2969;
e-mail: ebeling@cs.washington.edu
Office: Sieg Hall, Room 215
Carl Ebeling's research interests fall into two categories: VLSI architectures and computer-aided design of digital systems. He has worked on a number of VLSI projects including the Hitech chess machine, the Apex graphics chip for drawing spline curves and surfaces, and the Triptych field-programmable gate array. Currently he is involved in the Chaos project building a multicomputer routing network. His CAD interests focus on methods for optimizing the performance of circuits using level-sensitive latches, and placement and routing algorithms for FPGAs, particularly Triptych.
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